International Conference on Parallel Computing in Electrical Engineering (PARELEC'00)
Automatic Parallelization of Net Algorithms
Quebec, Canada
August 27-August 30
ISBN: 0-7695-0759-X
This paper presents a formal model, VHDL-model, techniques, and software for automatic parallelization of algorithms executed on an asynchronous network. The level of net algorithm concurrency is defined by a set of concurrent operation and variable pairs. The techniques and software target asynchronous high and system level synthesis and optimization of information processing in computer networks.
Citation:
Anatoly Prihozhy, Redouane Merdjani, Fuad Iskandar, "Automatic Parallelization of Net Algorithms," parelec, pp.24, International Conference on Parallel Computing in Electrical Engineering (PARELEC'00), 2000