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Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions
Automatic Detection of Logic Bugs in Hardware Designs
Hyatt Town Lake Hotel, Austin, Texas
May 29-May 30
ISBN: 0-7695-2045-6
Alexander Klaiber, Transmeta Corporation
Sinclair Chau, Transmeta Corporation
The verification of complex microprocessor designs is a tough challenge; high-speed hardware emulators can help improve confidence in design correctness by greatly increasing verification throughput. Most attractively, their speed makes it realistic to simulate entire "real-life" application programs, hopefully extending test coverage. The usefulness of this approach is however greatly reduced by the fact that any bugs exposed by real application programs (as opposed to carefully constructed small test cases) are exceedingly difficult to isolate and identify.
We have developed a tool that eliminates this problem by completely automating the task of isolating bugs in the hardware design, by periodically comparing execution against a known-good reference model. This new approach has vastly increased the value of our emulation efforts, and found several bugs that escaped the normal test suite. Moreover, bugs that used to take weeks of painstaking work to isolate have been identified automatically by our tool in a matter of hours.
Citation:
Alexander Klaiber, Sinclair Chau, "Automatic Detection of Logic Bugs in Hardware Designs," mtv, pp.47, Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions, 2003
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