Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions
DeepTrans - A Model-based Approach to Functional Verification of Address Translation Mechanisms
Hyatt Town Lake Hotel, Austin, Texas
May 29-May 30
ISBN: 0-7695-2045-6
This paper presents a new test case generation technology, specifically targeted at verifying systems that include address translation mechanisms. The ever-growing demand for performance makes these mechanisms more complex, thereby increasing the risk of bugs and increasing the need for such technology. DeepTrans is a package that provides model-based test generation capabilities to verify translation mechanisms based on a modeling language. The modeling language includes constructs for describing the address translation process, commonly used translation resources, and architecture rules related to translation. Deep-Trans is currently used by two different IBM test generators.
Citation:
Allon Adir, Roy Emek, Yoav Katz, Anatoly Koyfman, "DeepTrans - A Model-based Approach to Functional Verification of Address Translation Mechanisms," mtv, pp.3, Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions, 2003