loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
2003 International Workshop on Memory Technology, Design and Testing (MTDT'03)
A 40ns Random Access Time Low Voltage 2Mbits EEPROM Memory for Embedded Applications
San Jose, California
July 28-July 29
ISBN: 0-7695-2004-9
Jean-Michel Daga, ATMEL, Zone Industrielle
Caroline Papaix, ATMEL, Zone Industrielle
Emmanuel Racape, ATMEL, Zone Industrielle
Marylene Combe, ATMEL, Zone Industrielle
Vincent Sialelli, ATMEL, Zone Industrielle
Jeanine Guichaoua, ATMEL, Zone Industrielle
2Mbits EEPROM memory has been designed using the ATMEL 0.18 ?m embedded technology. On silicon program and read access time measurements are given, and an optimized production testing flow is proposed.
Citation:
Jean-Michel Daga, Caroline Papaix, Emmanuel Racape, Marylene Combe, Vincent Sialelli, Jeanine Guichaoua, "A 40ns Random Access Time Low Voltage 2Mbits EEPROM Memory for Embedded Applications," mtdt, pp.81, 2003 International Workshop on Memory Technology, Design and Testing (MTDT'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.