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The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002)
Converting an Embedded Low-Power SRAM from Bulk to PD-SOI
Isle of Bendor, France
July 10-July 12
ISBN: 0-7695-1617-3
Mario R. Casu, Politecnico di Torino
Philippe Flatresse, ST Microelectronics
The migration of an embedded 1 Mbit SRAM for low power applications from a 0.13\mu m Bulk to a Partially Depleted Silicon-on-Insulator (PDSOI) technology is described in this paper. Floating body effects such as threshold voltage variation and parasitic bipolar turn on and their impact on sense amplifiers, pass-gates based multiplexers and dynamic decoders are addressed. Solutions like the use of body contacts in specific parts are discussed. A SRAM chip with various testable configurations has been taped out.
Citation:
Mario R. Casu, Philippe Flatresse, "Converting an Embedded Low-Power SRAM from Bulk to PD-SOI," mtdt, pp.163, The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002), 2002
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