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The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002)
Fault Tolerant Insertion and Verification: A Case Study
Isle of Bendor, France
July 10-July 12
ISBN: 0-7695-1617-3
ASCII Text
x 
 
Alberto Manzone, Diego De Costantini, "Fault Tolerant Insertion and Verification: A Case Study," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 44, The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002), 2002.
 
 
BibTex
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@article{ 10.1109/MTDT.2002.1029762,
author = {Alberto Manzone and Diego De Costantini},
title = {Fault Tolerant Insertion and Verification: A Case Study},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2002},
issn = {1087-4852},
pages = {44},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2002.1029762},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Fault Tolerant Insertion and Verification: A Case Study
SN - 1087-4852
SP
EP
A1 - Alberto Manzone,
A1 - Diego De Costantini,
PY - 2002
KW - null
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Alberto Manzone, Centro Ricerche FIAT
Diego De Costantini, Centro Ricerche FIAT
The particular circuit structures that allow the building of a Fault Tolerant (FT) circuit have been extensively studied in the past, but currently there is a lack of CAD support in the design and evaluation of FT circuits. The aim of the AMATISTA European project (IST project 11762) is to develop a set of tools devoted to the design of FT digital circuits. The toolset is composed of: an automatic insertion tool and a simulation tool to validate the FT design. This paper is a case study describing how this set of FTI (Fault Tolerant Insertion) and FTV (Fault Tolerant Verification) tools have been used to increase the reliability in a typical automotive application.
Citation:
Alberto Manzone, Diego De Costantini, "Fault Tolerant Insertion and Verification: A Case Study," mtdt, pp.44, The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002), 2002
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