International Workshop on Memory Technology, Design, and Testing (MTDT'01)
Equivalence Checking a 256MB SDRAM
San Jose, California
August 06-August 07
ISBN: 0-7695-1242-9
Abstract: This paper outlines how symbolic simulation was used to verify both data and sequence integrity in a 256MB SDRAM. The initial step is to examine the underlying equivalence-checking engine and then explain how it is applied to SDRAM verification. SDRAM verification is interesting in that it captures both memory and sequence verification. The data integrity verification is valid for any type of memory structure and the sequence integrity can be extended to many types of sequenced machines.
Citation:
Simon Napper, Dian Yang, "Equivalence Checking a 256MB SDRAM," mtdt, pp.0085, International Workshop on Memory Technology, Design, and Testing (MTDT'01), 2001