2000 IEEE International Workshop on Memory Technology, Design and Testing (MTDT'00) March Tests for Realistic Faults in Two-Port Memories San Jose, California August 07-August 08 ISBN: 0-7695-0689-5
This paper starts with an overview of realistic fault models for two-port memories, divided into single-port faults and unique two-port faults. The latter faults cannot be detected with the conventional single-port memory tests; they require special tests. Thereafter, the paper presents a set of four march tests detecting the unique two-port faults. Three of the tests have a time complexity of \math and one of \math, whereby n is the size of the two-port memory cell array. Two of the four tests have been implemented at Intel and applied to 1500 two-port memories passing all single-port tests. The test results show that two dies fail to pass the implemented tests, which means that the tests are superior.
Citation:
Said Hamdioui, Ad J. van de Goor, Mike Rodgers, David Eastwick, "March Tests for Realistic Faults in Two-Port Memories," mtdt, pp.73, 2000 IEEE International Workshop on Memory Technology, Design and Testing (MTDT'00), 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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