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1999 IEEE International Workshop on Memory Technology, Design, and Testing
Tutorial: Characterizing SDRAMS
San Jose, California
August 09-August 10
ISBN: 0-7695-0259-8
ASCII Text
x 
 
Joerg Vollrath, "Tutorial: Characterizing SDRAMS," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 62, 1999 IEEE International Workshop on Memory Technology, Design, and Testing, 1999.
 
 
BibTex
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@article{ 10.1109/MTDT.1999.782685,
author = {Joerg Vollrath},
title = {Tutorial: Characterizing SDRAMS},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {1999},
issn = {1087-4852},
pages = {62},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.1999.782685},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Tutorial: Characterizing SDRAMS
SN - 1087-4852
SP
EP
A1 - Joerg Vollrath,
PY - 1999
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Joerg Vollrath, White Oak Semiconductor
This paper presents characterization methods for an SDRAM in a manufacturing environment. Contact tests, dc tests, basic functional tests, signal margin tests and retention characterization are shown. Measurement of the cell signal is used as an example for pico probing. Special test modes for SDRAMs which can be used to aid characterization and failure analysis (FA) are discussed.
Citation:
Joerg Vollrath, "Tutorial: Characterizing SDRAMS," mtdt, pp.62, 1999 IEEE International Workshop on Memory Technology, Design, and Testing, 1999
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