VALID: Custom ASIC Verification and FPGA Education Platform

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2003 International Conference on Microelectronics Systems Education (MSE'03)

VALID: Custom ASIC Verification and FPGA Education Platform (PDF)

Anaheim, California

June 01-June 02

ISBN: 0-7695-1973-3

	ASCII Text	x
	Patrick Murphy, J. Patrick Frantz, Erik Welsh, Ricky Hardy, Tinoosh Mohsenin, Joseph Cavallaro, "VALID: Custom ASIC Verification and FPGA Education Platform," Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on, pp. 64, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003.

	BibTex	x
	@article{ 10.1109/MSE.2003.1205257, author = {Patrick Murphy and J. Patrick Frantz and Erik Welsh and Ricky Hardy and Tinoosh Mohsenin and Joseph Cavallaro}, title = {VALID: Custom ASIC Verification and FPGA Education Platform}, journal ={Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1973-3}, pages = {64}, doi = {http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205257}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on TI - VALID: Custom ASIC Verification and FPGA Education Platform SN - 0-7695-1973-3 SP EP A1 - Patrick Murphy, A1 - J. Patrick Frantz, A1 - Erik Welsh, A1 - Ricky Hardy, A1 - Tinoosh Mohsenin, A1 - Joseph Cavallaro, PY - 2003 KW - null VL - 0 JA - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on ER -

Patrick Murphy, Rice University

J. Patrick Frantz, Rice University

Erik Welsh, Rice University

Ricky Hardy, Rice University

Tinoosh Mohsenin, Rice University

Joseph Cavallaro, Rice University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205257

This paper describes VALID, a platform for testing student designed ASICs and for teaching the basics of FPGA design. VALID is designed to maximize ease of use from a student?s perspective while maintaining enough flexibility for its use as an FPGA development and instruction platform. This system was designed entirely by students, has been successfully manufactured and is currently being used in a number of courses at Rice.

Citation:

Patrick Murphy, J. Patrick Frantz, Erik Welsh, Ricky Hardy, Tinoosh Mohsenin, Joseph Cavallaro, "VALID: Custom ASIC Verification and FPGA Education Platform," mse, pp.64, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003

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