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IEEE Fourth International Symposium on Multimedia Software Engineering (MSE'02)
The Impact of SMT/SMP Designs on Multimedia Software Engineering — A Workload Analysis Study
Newport Beach, California, USA
December 11-December 13
ISBN: 0-7695-1857-5
Yen-Kuang Chen, Intel Corporation
Rainer Lienhart, Intel Corporation
Eric Debes, Intel Corporation
Matthew Holliman, Intel Corporation
Minerva Yeung, Intel Corporation
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia software engineering. The multimedia workloads range from memory to computational-bounded kernels. A performance metric to evaluate effective SMT performance gain is introduced, and compared to similar metrics on symmetric multiprocessor (SMP) systems. In addition, we analyze and compare SMT versus SMP systems, and highlight the advantages in the studied applications. The results indicate that sharing the cache in SMT processors can provide better cache locality and thus better performance although sharing the cache can introduce cache conflicts and reduce the actual cache size available for each logical processor. We also propose "mutually beneficial prefetching" — a technique to schedule threads so that they prefetch data for each other in order to reduce cache miss penalty.
Citation:
Yen-Kuang Chen, Rainer Lienhart, Eric Debes, Matthew Holliman, Minerva Yeung, "The Impact of SMT/SMP Designs on Multimedia Software Engineering — A Workload Analysis Study," mse, pp.336, IEEE Fourth International Symposium on Multimedia Software Engineering (MSE'02), 2002
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