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First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE?03)
From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations
Mont Saint-Michel, France
June 24-June 26
ISBN: 0-7695-1923-7
ASCII Text
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Thierry Grandpierre, Yves Sorel, "From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations," Formal Methods and Models for Co-Design, ACM/IEEE International Conference on, pp. 123, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE?03), 2003.
 
 
BibTex
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@article{ 10.1109/MEMCOD.2003.1210097,
author = {Thierry Grandpierre and Yves Sorel},
title = {From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations},
journal ={Formal Methods and Models for Co-Design, ACM/IEEE International Conference on},
volume = {0},
year = {2003},
isbn = {0-7695-1923-7},
pages = {123},
doi = {http://doi.ieeecomputersociety.org/10.1109/MEMCOD.2003.1210097},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Formal Methods and Models for Co-Design, ACM/IEEE International Conference on
TI - From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations
SN - 0-7695-1923-7
SP
EP
A1 - Thierry Grandpierre,
A1 - Yves Sorel,
PY - 2003
KW - null
VL - 0
JA - Formal Methods and Models for Co-Design, ACM/IEEE International Conference on
ER -
 
Thierry Grandpierre, ESIEE Paris, Cite Descarte BP99
Yves Sorel, INRIA, Domaine de Voluceau BP 105
This paper presents a seamless flow of transformations which performs dedicated distributed executive generation from a high level specification of a pair: algorithm, architecture. This work is based upon graph models and graph transformations and is part of the AAA methodology. We present an original architecture model which allows to perform accurate sequencer modeling, memory allocation, and heterogeneous inter-processor communications for both modes shared memory and message passing. Then we present the flow of transformations that leads to the automatic generation of dedicated real-time distributed executives which are deadlock free. This transformation flow has been implemented in a system level CAD software tool called SynDEx.
Citation:
Thierry Grandpierre, Yves Sorel, "From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations," memocode, pp.123, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE?03), 2003
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