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28th Annual IEEE International Conference on Local Computer Networks (LCN'03)
A holistic methodology for network processor design
Bonn/K?nigswinter, Germany
October 20-October 24
ISBN: 0-7695-2037-5
Olaf Bonorden, University of Paderborn, Germany
Nikolaus Br?, Infineon Technologies, Munich, Germany
Uwe Kastens, University of Paderborn, Germany
Dinh Khoi Le, University of Paderborn, Germany
Friedhelm Meyer auf der Heide, University of Paderborn, Germany
J?rg-Christian Niemann, University of Paderborn, Germany
Mario Porrmann, University of Paderborn, Germany
Ulrich R?ckert, University of Paderborn, Germany
Adrian Slowik, University of Paderborn, Germany
Michael Thies, University of Paderborn, Germany
The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, evaluation, and realization of a parameterizable network processing unit. In this paper we present a design methodology for network processors which encompasses the research areas from the application software down to the gate level of the chip. Key components of this holistic approach have been successfully applied to characteristic examples of architecture refinements.
Citation:
Olaf Bonorden, Nikolaus Br?, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, J?rg-Christian Niemann, Mario Porrmann, Ulrich R?ckert, Adrian Slowik, Michael Thies, "A holistic methodology for network processor design," lcn, pp.583, 28th Annual IEEE International Conference on Local Computer Networks (LCN'03), 2003
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