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International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2
On Permutation Operations in Cipher Design
Las Vegas, Nevada
April 05-April 07
ISBN: 0-7695-2108-8
Ruby B. Lee, Princeton University, NJ
Z. J. Shi, Princeton University, NJ
Y. L. Yin, Princeton University, NJ
Ronald L. Rivest, CSAIL, Cambridge, MA
M.J.B. Robshaw, University of London, UK
New and emerging applications can change the mix of operations commonly used within computer architectures. It is sometimes surprising when instruction-set architecture (ISA) innovations intended for one purpose are used for other (initially unintended) purposes. This paper considers recent proposals for the processor support of families of bit-level permutations. From a processor architecture point of view, the ability to support very fast bit-level permutations may be viewed as a further validation of the basic word-orientation of processors, and their ability to support next-generation secure multimedia processing. However, bitwise permutations are also fundamental operations in many cryptographic primitives and we discuss the suitability of these new operations for cryptographic purposes.
Citation:
Ruby B. Lee, Z. J. Shi, Y. L. Yin, Ronald L. Rivest, M.J.B. Robshaw, "On Permutation Operations in Cipher Design," itcc, vol. 2, pp.569, International Conference on Information Technology: Coding and Computing (ITCC'04) Volume 2, 2004
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