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International Test Conference 2003 (ITC'03)
Deformations of IC Structure in Test and Yield Learning
Charlotte, NC, USA
September 30-October 02
ISBN: 0-7803-8107-6
W. Maly, Carnegie Mellon University, Pittsburgh, PA
T. Zanon, Carnegie Mellon University, Pittsburgh, PA
T. Vogels, Carnegie Mellon University, Pittsburgh, PA
R. D. Blanton, Carnegie Mellon University, Pittsburgh, PA
T. Storey, PDF Solutions
This paper argues that the existing approaches to modeling and characterization of IC malfunctions are inadequate for test and yield learning of Deep Sub-Micron (DSM) products. Traditional notions of a spot defect and local and global process variations are analyzed and their shortcomings are exposed. A detailed taxonomy of process-induced deformations of DSM IC structures, enabling modeling and characterization of IC malfunctions, is proposed. The blueprint of a roadmap enabling such a characterization is suggested.
Index Terms:
yield learning, fault modeling, defects, diagnosis, defect characterization
Citation:
W. Maly, A. Gattiker, T. Zanon, T. Vogels, R. D. Blanton, T. Storey, "Deformations of IC Structure in Test and Yield Learning," itc, pp.856, International Test Conference 2003 (ITC'03), 2003
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