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International Test Conference 2003 (ITC'03)
Burn-in Temperature Projections for Deep Sub-micron Technologies
Charlotte, NC, USA
September 30-October 02
ISBN: 0-7803-8107-6
Oleg Semenov, University of Waterloo, Canada
Arman Vassighi, University of Waterloo, Canada
Manoj Sachdev, University of Waterloo, Canada
Ali Keshavarzi, Intel Corporation, Hillsboro, OR
C.F. Hawkins, University of New Mexico, Albuquerque
Burn-in faces significant challenges in recent CMOS technologies. The self-generated heat of each IC in a burn-in environment contributes to larger currents that can lead to further increase in junction temperatures, possible thermal run away, and yield-loss of good parts. Calculations show that the junction temperature is increasing by 1.45X/generation. This paper estimates the increase in junction temperature with scaling and discusses the optimal burn-in temperature with scaling. Our research indicates that the burn-in temperature must also be reduced with technology scaling. The impact on commercial burn-in ovens is also described.
Citation:
Oleg Semenov, Arman Vassighi, Manoj Sachdev, Ali Keshavarzi, C.F. Hawkins, "Burn-in Temperature Projections for Deep Sub-micron Technologies," itc, pp.95, International Test Conference 2003 (ITC'03), 2003
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