Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results

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International Test Conference 2003 (ITC'03)

Charlotte, NC, USA

September 30-October 02

ISBN: 0-7803-8107-6

	ASCII Text	x
	Yoshihito Nishizaki, Osamu Nakayama, Chiaki Matsumoto, Yoshitaka Kimura, Toshimi Kobayashi, Hiroyuki Nakamura, "Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results," Test Conference, International, pp. 85, International Test Conference 2003 (ITC'03), 2003.

	BibTex	x
	@article{ 10.1109/TEST.2003.1270828, author = {Yoshihito Nishizaki and Osamu Nakayama and Chiaki Matsumoto and Yoshitaka Kimura and Toshimi Kobayashi and Hiroyuki Nakamura}, title = {Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results}, journal ={Test Conference, International}, volume = {0}, year = {2003}, issn = {1089-3539}, pages = {85}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1270828}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results SN - 1089-3539 SP EP A1 - Yoshihito Nishizaki, A1 - Osamu Nakayama, A1 - Chiaki Matsumoto, A1 - Yoshitaka Kimura, A1 - Toshimi Kobayashi, A1 - Hiroyuki Nakamura, PY - 2003 KW - null VL - 0 JA - Test Conference, International ER -

Yoshihito Nishizaki, Kawasaki Microelectronics, Inc.

Osamu Nakayama, Kawasaki Microelectronics, Inc.

Chiaki Matsumoto, Kawasaki Microelectronics, Inc.

Yoshitaka Kimura, Kawasaki Microelectronics, Inc.

Toshimi Kobayashi, Kawasaki Microelectronics, Inc.

Hiroyuki Nakamura, Kawasaki Microelectronics, Inc.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1270828

This paper presents the implementation and results of the test suite for DSM ASIC consisting of static, \DeltaIddq, and dynamic patterns based on scan, and quantitatively reports the advantages of dynamic pattern over AC static pattern, even at a low frequency, and advantages of \DeltaIddq test over traditional Iddq. A defect level calculation method is presented which decomposes the defect level into, and considers interaction between, static, \DeltaIddq, dynamic, and memory BIST defects. Defect density and defect level are also reported based on the new method.

Citation:

Yoshihito Nishizaki, Osamu Nakayama, Chiaki Matsumoto, Yoshitaka Kimura, Toshimi Kobayashi, Hiroyuki Nakamura, "Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results," itc, pp.85, International Test Conference 2003 (ITC'03), 2003

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