Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor

I
ITC
2002
International Test Conference 2002 (ITC'02)
Abstract - Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Dawit Belete Articles by Ashutosh Razdan Articles by William Schwarz Articles by Rajesh Raina Articles by Christopher Hawkins Articles by Jeff Morehead

International Test Conference 2002 (ITC'02)

Baltimore, MD, USA

October 07-October 10

ISBN: 0-7803-7543-2

	ASCII Text	x
	Dawit Belete, Ashutosh Razdan, William Schwarz, Rajesh Raina, Christopher Hawkins, Jeff Morehead, "Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor," Test Conference, International, pp. 1111, International Test Conference 2002 (ITC'02), 2002.

	BibTex	x
	@article{ 10.1109/TEST.2002.1041868, author = {Dawit Belete and Ashutosh Razdan and William Schwarz and Rajesh Raina and Christopher Hawkins and Jeff Morehead}, title = {Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor}, journal ={Test Conference, International}, volume = {0}, year = {2002}, isbn = {0-7803-7543-2}, pages = {1111}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041868}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor SN - 0-7803-7543-2 SP EP A1 - Dawit Belete, A1 - Ashutosh Razdan, A1 - William Schwarz, A1 - Rajesh Raina, A1 - Christopher Hawkins, A1 - Jeff Morehead, PY - 2002 KW - null VL - 0 JA - Test Conference, International ER -

Dawit Belete, Motorola Inc.

Ashutosh Razdan, Motorola Inc.

William Schwarz, Motorola Inc.

Rajesh Raina, Motorola Inc.

Christopher Hawkins, Motorola Inc.

Jeff Morehead, Motorola Inc.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041868

This paper presents a practical case-study of using DFT techniques for speed-grading Motorola MPC7455, a 1GHz+ microprocessor. The effectiveness of transition fault, path-delay AC-scan patterns and array BIST is compared with functional patterns for speed-grading the parts. We discuss the capabilities and challenges with using the DFT methods based on production data.

Citation:

Dawit Belete, Ashutosh Razdan, William Schwarz, Rajesh Raina, Christopher Hawkins, Jeff Morehead, "Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor," itc, pp.1111, International Test Conference 2002 (ITC'02), 2002

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.