CMOS circuit technology to realize high-precision GHz-Timing-Generator is described. The timing error factors in the CMOS circuit are explained and solutions are given. Reduced swing intra-chip interconnection method using "DC loaded circuitry" is proposed and its improvement effect of the wiring delay due to wiring capacitance and suppression effect of the transitional change (noise) of IDD/ISS are described. A prototype chip of a dynamically-controllable-on-the-fly timing generator was fabricated in a 0.25 µm CMOS. An output rate of 1.066GHz max., Timing Control Rate 1.066 GHz, Delay INL +/-8ps, Random Jitter 1.5ps rms and Total Deterministic Jitter 20ps p-p were achieved.