International Test Conference 2002 (ITC'02) An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes Baltimore, MD, USA October 07-October 10 ISBN: 0-7803-7543-2
When VLSI scaling reaches closer to the limits of laws of physics and to the limits of fabrication processes, yields will decrease, especially at desired speed. However, for a large class of applications, chips need not be perfect to be acceptable. In this paper, we describe the notion of threshold testing that can help improve effective yield for future processes. We then develop an ATPG and demonstrate that significant increase in effective yield can be attained at negligible increase in test application cost.
Citation:
Zhigang Jiang, Sandeep K. Gupta, "An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes," itc, pp.824, International Test Conference 2002 (ITC'02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||