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International Test Conference 2002 (ITC'02)
A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter
Baltimore, MD, USA
October 07-October 10
ISBN: 0-7803-7543-2
Takahiro J. Yamaguchi, Advantest Laboratories, Ltd.
Mani Soma, University of Washington
Masahiro Ishida, Advantest Laboratories, Ltd.
Hirobumi Musha, Advantest Corporation
Louis Malarsie, Agere Systems
This paper presents a new method for measuring jitter tolerance of a SerDes receiver using the timing misalignment between the jittered source clock and the recovered clock. A sinusoidal jitter is injected into the serial bit stream. The method derives an equation for estimating BER accurately and is 10X faster than the conventional BER test method. The accuracy and test speed of the method are verified by 2.5 Gbps and 10 Gbps-SerDes experiments.
Citation:
Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie, "A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter," itc, pp.717, International Test Conference 2002 (ITC'02), 2002
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