Screening MinVDD Outliers Using Feed-Forward Voltage Testing

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by R. Madge Articles by B.H. Goh Articles by V. Rajagopalan Articles by C. Macchietto Articles by R. Daasch Articles by C. Schuermyer Articles by C. Taylor Articles by D. Turner

International Test Conference 2002 (ITC'02)

Baltimore, MD, USA

October 07-October 10

ISBN: 0-7803-7543-2

	ASCII Text	x
	R. Madge, B.H. Goh, V. Rajagopalan, C. Macchietto, R. Daasch, C. Schuermyer, C. Taylor, D. Turner, "Screening MinVDD Outliers Using Feed-Forward Voltage Testing," Test Conference, International, pp. 673, International Test Conference 2002 (ITC'02), 2002.

	BibTex	x
	@article{ 10.1109/TEST.2002.1041819, author = {R. Madge and B.H. Goh and V. Rajagopalan and C. Macchietto and R. Daasch and C. Schuermyer and C. Taylor and D. Turner}, title = {Screening MinVDD Outliers Using Feed-Forward Voltage Testing}, journal ={Test Conference, International}, volume = {0}, year = {2002}, isbn = {0-7803-7543-2}, pages = {673}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041819}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Screening MinVDD Outliers Using Feed-Forward Voltage Testing SN - 0-7803-7543-2 SP EP A1 - R. Madge, A1 - B.H. Goh, A1 - V. Rajagopalan, A1 - C. Macchietto, A1 - R. Daasch, A1 - C. Schuermyer, A1 - C. Taylor, A1 - D. Turner, PY - 2002 KW - null VL - 0 JA - Test Conference, International ER -

R. Madge, LSI Logic Corporation

B.H. Goh, LSI Logic Corporation

V. Rajagopalan, LSI Logic Corporation

C. Macchietto, LSI Logic Corporation

R. Daasch, Portland State University

C. Schuermyer, Portland State University

C. Taylor, Portland State University

D. Turner, Portland State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041819

MinVDD testing using full vector set search routines consume too much test time.A 3-step process is proposed using (1) a reduced vector set (RVS) binary search to measure the intrinsic (defect free) MinVDD fora die, (2) a feed-forward to the full vector set (FVS) for Low Voltage testing and (3) Delta VDD and Nearest Neighbor Residual Statistical Post-Processing (SPP) are applied to the data to screen the MinVDD outliers that are identified using the RVS binary search.RVS vs.FVS correlation data is shown on 3 products. Data shows minVDD yield fall out of 0.2-0.8% and 20% of the minVDD outliers shows significant VDD shifts in burn-in.

Citation:

R. Madge, B.H. Goh, V. Rajagopalan, C. Macchietto, R. Daasch, C. Schuermyer, C. Taylor, D. Turner, "Screening MinVDD Outliers Using Feed-Forward Voltage Testing," itc, pp.673, International Test Conference 2002 (ITC'02), 2002

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.