A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test

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	Similar Articles Articles by Shigeki Tomishima Articles by Hiroaki Tanizaki Articles by Mitsutaka Niiro Articles by Masanao Maruta Articles by Hideto Hidaka Articles by T. Tada Articles by Kenji Gamo

International Test Conference 2002 (ITC'02)

Baltimore, MD, USA

October 07-October 10

ISBN: 0-7803-7543-2

	ASCII Text	x
	Shigeki Tomishima, Hiroaki Tanizaki, Mitsutaka Niiro, Masanao Maruta, Hideto Hidaka, T. Tada, Kenji Gamo, "A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test," Test Conference, International, pp. 170, International Test Conference 2002 (ITC'02), 2002.

	BibTex	x
	@article{ 10.1109/TEST.2002.1041758, author = {Shigeki Tomishima and Hiroaki Tanizaki and Mitsutaka Niiro and Masanao Maruta and Hideto Hidaka and T. Tada and Kenji Gamo}, title = {A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test}, journal ={Test Conference, International}, volume = {0}, year = {2002}, isbn = {0-7803-7543-2}, pages = {170}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041758}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test SN - 0-7803-7543-2 SP EP A1 - Shigeki Tomishima, A1 - Hiroaki Tanizaki, A1 - Mitsutaka Niiro, A1 - Masanao Maruta, A1 - Hideto Hidaka, A1 - T. Tada, A1 - Kenji Gamo, PY - 2002 KW - null VL - 0 JA - Test Conference, International ER -

Shigeki Tomishima, Mitsubishi Electric Corporation and Osaka University

Hiroaki Tanizaki, Mitsubishi Electric Engineering Co., Ltd.

Mitsutaka Niiro, Mitsubishi Electric Corporation

Masanao Maruta, Mitsubishi Electric Corporation

Hideto Hidaka, Mitsubishi Electric Corporation

T. Tada, Mitsubishi Electric Corporation

Kenji Gamo, Osaka University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041758

A System In a Package (SIP) is another candidate of future embedded system hips against the System On a Chip (SOC). The SIP has intra connections, which have small IO load. On the other hand, the high frequency wafer test has large IO load caused by probe, Hi-Fix and coaxial cable. This paper makes these incompatible load problems clear and proposes a new output buffer to overcome them. A new variable drivability (VD) output buffer can provide the optimum driving ability for both the SIP intra-connection and the high frequency (over 100MHz) wafer test. This proposed output buffer realizes new SIP test flow containing high frequency wafer test and reduction of the total test cost of embedded DRAM chip by 35% compared with the SOC test cost.

Citation:

Shigeki Tomishima, Hiroaki Tanizaki, Mitsutaka Niiro, Masanao Maruta, Hideto Hidaka, T. Tada, Kenji Gamo, "A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test," itc, pp.170, International Test Conference 2002 (ITC'02), 2002

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