Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm

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International Test Conference 2002 (ITC'02)

Baltimore, MD, USA

October 07-October 10

ISBN: 0-7803-7543-2

	ASCII Text	x
	Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, "Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm," Test Conference, International, pp. 74, International Test Conference 2002 (ITC'02), 2002.

	BibTex	x
	@article{ 10.1109/TEST.2002.1041747, author = {Yu Huang and Sudhakar M. Reddy and Wu-Tung Cheng and Paul Reuter and Nilanjan Mukherjee and Chien-Chung Tsai and Omer Samman and Yahya Zaidan}, title = {Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm}, journal ={Test Conference, International}, volume = {0}, year = {2002}, isbn = {0-7803-7543-2}, pages = {74}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041747}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm SN - 0-7803-7543-2 SP EP A1 - Yu Huang, A1 - Sudhakar M. Reddy, A1 - Wu-Tung Cheng, A1 - Paul Reuter, A1 - Nilanjan Mukherjee, A1 - Chien-Chung Tsai, A1 - Omer Samman, A1 - Yahya Zaidan, PY - 2002 KW - null VL - 0 JA - Test Conference, International ER -

Yu Huang, Mentor Graphics Corporation

Sudhakar M. Reddy, University of Iowa

Wu-Tung Cheng, Mentor Graphics Corporation

Paul Reuter, Mentor Graphics Corporation

Nilanjan Mukherjee, Mentor Graphics Corporation

Chien-Chung Tsai, Mentor Graphics Corporation

Omer Samman, Mentor Graphics Corporation

Yahya Zaidan, Mentor Graphics Corporation

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041747

This paper presents a method to consider a given SOC with pin and peak power constraints, and simultaneously (1) determine an optimal wrapper width for each core, (2) allocate SOC pins to cores and (3) schedule core tests to minimize the test completion time. For the first time the stated problem is formulated as a restricted 3-dimensional bin-packing problem and a heuristic to determine an optimal solution is proposed.

Citation:

Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, "Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm," itc, pp.74, International Test Conference 2002 (ITC'02), 2002

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