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IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
System Design Approach To Power Aware Mobile Computers
Tampa, Florida
February 20-February 21
ISBN: 0-7695-1904-0
J. Warren, Carnegie Mellon University
T. Martin, Carnegie Mellon University
A. Smailagic, Carnegie Mellon University
D. P. Siewiorek, Carnegie Mellon University
This paper describes a system level design approach to power awareness in the wearable computers project at Carnegie Mellon University. The paper identifies the major components of power consumption in a mobile computer, evaluates their respective contributions to power consumption, and analyzes various techniques for improving their energy efficiency. The paper describes our research framework and experimental evaluations of techniques for improving energy efficiency of a system, ranging from the communication level down to the physical level of the battery. The work described includes techniques for dynamically varying the CPU clock frequency.
Citation:
J. Warren, T. Martin, A. Smailagic, D. P. Siewiorek, "System Design Approach To Power Aware Mobile Computers," isvlsi, pp.101, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003
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