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Proceedings of the 15th international symposium on System Synthesis (ISSS '02)
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis
Kyoto, Japan
October 02-October 04
ISBN: 1-58113-576-9
Alex Nicolau, University of California at Irvine
Nikil Dutt, University of California at Irvine
Rajesh Gupta, University of California at Irvine
Nick Savoiu, University of California at Irvine
Mehrdad Reshadi, University of California at Irvine
Sumit Gupta, University of California at Irvine
We introduce a new approach, "Dynamic Common Sub-expression Elimination (CSE)", that dynamically eliminates common sub- expressions based on new opportunities created during scheduling of control-intensive designs. Classical CSE techniques fail to eliminate several common sub-expressions in control-intensive designs due to the presence of a complex mix of control and data-flow. Aggressive speculative code motions employed to schedule control-intensive designs often re-order, speculate and duplicate operations, hence changing the control flow between the operations with common sub-expressions. This leads to new opportunities for applying CSE dynamically. We have implemented dynamic CSE in a high-level synthesis framework called Spark and present results for experiments performed using various combinations of CSE and dynamic CSE. The benchmarks used consist of four functional blocks derived from two moderately complex industrial-strength applications, namely, MPEG-1 and the GIMP image processing tool. Our dynamic CSE techniques result in improvements of up to 22% in the controller size and up to 31% in performance; easily surpassing the improvements obtained by the traditional CSE approach. We also observe an unexpected (and significant) reduction in the number of registers using our approach.
Index Terms:
common sub-expression elimination, dynamic CSE, high-level synthesis, parallelizing transformations
Citation:
Alex Nicolau, Nikil Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta, "Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis," isss, pp.261-266, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002
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