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Proceedings of the 15th international symposium on System Synthesis (ISSS '02)
Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems
Kyoto, Japan
October 02-October 04
ISBN: 1-58113-576-9
Hiroto Yasuura, Kyushu University, Fukuoka 816-8580, Japan
Hiroyuki Tomiyama, Institute of Systems&Information Technologies, Momochihama, Fukuoka 814-0001, Japan
Takanori Okuma, Kyushu University, Fukuoka 816-8580, Japan
Yun Cao, Kyushu University, Fukuoka 816-8580, Japan
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for application-specific systems, called VAbM technique. It targets the exploitation of both data locality and effective bitwidth of variables to reduce energy consumed by redundant bits. Under constraints of the number of memory banks, the VAbM technique use variable analysis results to perform allocating and assigning on-chip RAM into multiple memory banks, which have different size with different number of word lines and different number of bit lines tailored to each application requirements. Experimental results with several real embedded applications demonstrate significant energy reduction up to 64.8% over monolithic memory, and 18.4% over memory designed by banking technique.
Index Terms:
3DES, AES, DES, IPSec, RSA, SSL, WTLS, decryption, design methodology, embedded system, encryption, handset, mobile computing, performance, platform, security, security processing, system architecture, wireless communications
Citation:
Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma, Yun Cao, "Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems," isss, pp.201-206, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002
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