CMP on SoC: Architect's View

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Proceedings of the 15th international symposium on System Synthesis (ISSS '02)

Kyoto, Japan

October 02-October 04

ISBN: 1-58113-576-9

	ASCII Text	x
	Shuichi Sakai, "CMP on SoC: Architect's View," System Synthesis, International Symposium on, pp. 101-102, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002.

	BibTex	x
	@article{ 10.1109/ISSS.2002.1227159, author = {Shuichi Sakai}, title = {CMP on SoC: Architect's View}, journal ={System Synthesis, International Symposium on}, volume = {0}, year = {2002}, isbn = {1-58113-576-9}, pages = {101-102}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227159}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - System Synthesis, International Symposium on TI - CMP on SoC: Architect's View SN - 1-58113-576-9 SP101 EP102 A1 - Shuichi Sakai, PY - 2002 KW - CMP (Chip Multiprocessor) KW - I/O centric KW - SoC (System on Chip) KW - dependability KW - parallel processing VL - 0 JA - System Synthesis, International Symposium on ER -

Shuichi Sakai, The University of Tokyo, Tokyo, Japan

This briefly sketches the current issues of chip multiprocessor (CMP) design for system LSI chip from the viewpoint of computer architects.

Index Terms:

CMP (Chip Multiprocessor), I/O centric, SoC (System on Chip), dependability, parallel processing

Citation:

Shuichi Sakai, "CMP on SoC: Architect's View," isss, pp.101-102, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002

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