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13th International Symposium on System Synthesis (ISSS'00)
A Multi-Level Strategy for Software Power Estimation
Madrid, Spain
September 20-September 22
ISBN: 0-7695-0765-4
ASCII Text
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C. Brandolese, W. Fornaciari, L. Pomante, F. Salice, D. Sciuto, "A Multi-Level Strategy for Software Power Estimation," System Synthesis, International Symposium on, pp. 187, 13th International Symposium on System Synthesis (ISSS'00), 2000.
 
 
BibTex
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@article{ 10.1109/ISSS.2000.874048,
author = {C. Brandolese and W. Fornaciari and L. Pomante and F. Salice and D. Sciuto},
title = {A Multi-Level Strategy for Software Power Estimation},
journal ={System Synthesis, International Symposium on},
volume = {0},
year = {2000},
issn = {1080-1820},
pages = {187},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISSS.2000.874048},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - System Synthesis, International Symposium on
TI - A Multi-Level Strategy for Software Power Estimation
SN - 1080-1820
SP
EP
A1 - C. Brandolese,
A1 - W. Fornaciari,
A1 - L. Pomante,
A1 - F. Salice,
A1 - D. Sciuto,
PY - 2000
VL - 0
JA - System Synthesis, International Symposium on
ER -
 
C. Brandolese, Politecnico di Milano
W. Fornaciari, Politecnico di Milano
L. Pomante, Politecnico di Milano
F. Salice, Politecnico di Milano
D. Sciuto, Politecnico di Milano
In this paper, a comprehensive methodology for software power estimation is presented. The methodology is supported by rigorous mathematical models of power consumption at three different levels of abstraction. The methodology has been validated in a complete framework developed within the TOSCA co-design environment.
Citation:
C. Brandolese, W. Fornaciari, L. Pomante, F. Salice, D. Sciuto, "A Multi-Level Strategy for Software Power Estimation," isss, pp.187, 13th International Symposium on System Synthesis (ISSS'00), 2000
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