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Fourth International Symposium on Quality Electronic Design
On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond
San Jose, California
March 24-March 26
ISBN: 0-7695-1881-8
ASCII Text
x 
 
SoYoung Kim, Yehia Massoud, S. Simon Wong, "On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond," Quality Electronic Design, International Symposium on, pp. 401, Fourth International Symposium on Quality Electronic Design, 2003.
 
 
BibTex
x
 
@article{ 10.1109/ISQED.2003.1194766,
author = {SoYoung Kim and Yehia Massoud and S. Simon Wong},
title = {On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond},
journal ={Quality Electronic Design, International Symposium on},
volume = {0},
year = {2003},
isbn = {0-7695-1881-8},
pages = {401},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2003.1194766},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Quality Electronic Design, International Symposium on
TI - On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond
SN - 0-7695-1881-8
SP
EP
A1 - SoYoung Kim,
A1 - Yehia Massoud,
A1 - S. Simon Wong,
PY - 2003
KW - null
VL - 0
JA - Quality Electronic Design, International Symposium on
ER -
 
SoYoung Kim, Stanford University
Yehia Massoud, Synopsys Inc.
S. Simon Wong, Stanford University
The most common assumption for chip-level inductance extraction is to restrict the current return path to the closest power or ground lines. This paper shows that this assumption is not necessarily valid for technologies beyond 0.1?m. The actual inductance can exceed twice the value that is extracted from the model considering only the nearest current return paths. Analytical formulae to predict the worst case self inductance are proposed to deal with the errors that result from this assumption. These equations can be used as metrics to decide the size of inductance extraction window for future CAD tools.
Citation:
SoYoung Kim, Yehia Massoud, S. Simon Wong, "On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond," isqed, pp.401, Fourth International Symposium on Quality Electronic Design, 2003
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