On-Chip Interconnect Inductance - Friend or Foe (Invited)

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Fourth International Symposium on Quality Electronic Design

San Jose, California

March 24-March 26

ISBN: 0-7695-1881-8

	ASCII Text	x
	S. Simon Wong, Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O?Mahony, "On-Chip Interconnect Inductance - Friend or Foe (Invited)," Quality Electronic Design, International Symposium on, pp. 389, Fourth International Symposium on Quality Electronic Design, 2003.

	BibTex	x
	@article{ 10.1109/ISQED.2003.1194764, author = {S. Simon Wong and Patrick Yue and Richard Chang and So-Young Kim and Bendik Kleveland and Frank O?Mahony}, title = {On-Chip Interconnect Inductance - Friend or Foe (Invited)}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1881-8}, pages = {389}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2003.1194764}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Quality Electronic Design, International Symposium on TI - On-Chip Interconnect Inductance - Friend or Foe (Invited) SN - 0-7695-1881-8 SP EP A1 - S. Simon Wong, A1 - Patrick Yue, A1 - Richard Chang, A1 - So-Young Kim, A1 - Bendik Kleveland, A1 - Frank O?Mahony, PY - 2003 KW - null VL - 0 JA - Quality Electronic Design, International Symposium on ER -

S. Simon Wong, Stanford University

Patrick Yue, Stanford University

Richard Chang, Stanford University

So-Young Kim, Stanford University

Bendik Kleveland, Stanford University

Frank O?Mahony, Stanford University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2003.1194764

Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz regime. Because the magnetic field propagates a very long range, the extraction of wire inductance is not just dependent on the immediate neighboring environment. This paper discusses the various difficulties of extracting inductance of randomly placed wires in a typical chip environment. With dedicated return path, the wire inductance can be controlled and benefit the design of high-speed circuits. Specific examples are illustrated.

Citation:

S. Simon Wong, Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O?Mahony, "On-Chip Interconnect Inductance - Friend or Foe (Invited)," isqed, pp.389, Fourth International Symposium on Quality Electronic Design, 2003

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