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Fourth International Symposium on Quality Electronic Design
Electrical and Thermal Analysis for System-in-a-Package (SiP) Implementation Platform
San Jose, California
March 24-March 26
ISBN: 0-7695-1881-8
Michael Wang, University of California, Santa Cruz
Katsuharu Suzuki, University of California, Santa Cruz
Wayne Dai, University of California, Santa Cruz
This paper presents an electrical and thermal performance analysis of System-in-a-Package (SiP) memory/logic implementation platform based on Chip-Laminate- Chip (CLC) technology. Internal IO interface inside CLC module has been modeled and compared with Stack-Chip (SC) implementation. Thermal analysis, including comparison against Stack-Chip and System-on-a- Chip (SoC) is also presented. It is demonstrated that CLC technology provides significant performance advantage over conventional SiP technologies and has great impact on future system-level integration.
Citation:
Michael Wang, Katsuharu Suzuki, Wayne Dai, "Electrical and Thermal Analysis for System-in-a-Package (SiP) Implementation Platform," isqed, pp.229, Fourth International Symposium on Quality Electronic Design, 2003
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