How does on-chip inductance impact timing closure when transitioning from Al to Cu based technology? This paper presents some experimental results based on a Al-based 0.18 μm CMOS process and a Cu-based 0.13 μm CMOS process. The results show that the impact of on-chip inductance is slightly more on the Cu-based 0.3 μm process than on the Al-based 0.18 μm process. Furthermore, the results demonstrate that on-chip inductance plays an insignificant role if we assume a perfect power supply network around the interconnect routes.