First International Symposium on Quality of Electronic Design A Pre-Simulation Measure of D.C. Design-for-Testability Fault Diagnosis Quality San Jose, California March 20-March 22 ISBN: 0-7695-0525-2
Equivalent faults inhibit fault diagnosis by producing indistinguishable test metric measurements. Removal of conditions causing the equivalence in response exhibited by such faults is necessary if fault diagnosis quality is to be improved. As Design-for-Testability methodology aims to deliver a degree of fault diagnosis substantially greater than that obtainable testing unassisted by on-chip test specific hardware, designing a Design-for-Testability scheme with minimal fault equivalence is an issue to be addressed. Presented is a set of simple and inexpensive tests, applied pre-simulation, for identifying catastrophic resistive component faults that cause numerically equivalent D.C. test node responses. Using a biquadratic notch filter modified with a novel Design-for-Testability scheme, we demonstrate that equivalent fault information is a useful initial measure for assessing the potential increase in fault diagnosis quality obtainable with a Design-for-Testability scheme.
Index Terms:
Design for testability, Fault collapsing, Fault diagnosis, Equivalent faults, One-port circuits
Citation:
Matthew Worsman, Mike W.T. Wong, Y.S. Lee, "A Pre-Simulation Measure of D.C. Design-for-Testability Fault Diagnosis Quality," isqed, pp.361, First International Symposium on Quality of Electronic Design, 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||