A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder

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	Similar Articles Articles by S. Nandi Articles by Ch. Rambabu Articles by P. Pal Chaudhari

1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99)

Fremantle, Australia

June 23-June 25

ISBN: 0-7695-0231-8

	ASCII Text	x
	S. Nandi, Ch. Rambabu, P. Pal Chaudhari, "A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder," Parallel Architectures, Algorithms, and Networks, International Symposium on, pp. 158, 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99), 1999.

	BibTex	x
	@article{ 10.1109/ISPAN.1999.778933, author = {S. Nandi and Ch. Rambabu and P. Pal Chaudhari}, title = {A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder}, journal ={Parallel Architectures, Algorithms, and Networks, International Symposium on}, volume = {0}, year = {1999}, issn = {1087-4089}, pages = {158}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISPAN.1999.778933}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Architectures, Algorithms, and Networks, International Symposium on TI - A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder SN - 1087-4089 SP EP A1 - S. Nandi, A1 - Ch. Rambabu, A1 - P. Pal Chaudhari, PY - 1999 KW - Cellular Automata(CA) KW - S b EC-D b ED KW - Extended Reed-Soloman code KW - pipeline KW - t b EC - t b ED KW - Cellular Automata Array(CAA) KW - VLSI VL - 0 JA - Parallel Architectures, Algorithms, and Networks, International Symposium on ER -

S. Nandi, Indian Institute of Technology

Ch. Rambabu, Indian Institute of Technology

P. Pal Chaudhari, B. E College

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISPAN.1999.778933

Design of Cellular Automata(CA) based S b EC-D b ED code analogous to Extended Reed-Solomon code [1] has been proposed in [2] This code has the same restriction on error correction capability as that of Extended RS code. In this paper a new scheme has been proposed for pipeline implementation of CA base tb EC - tb ED codes that are analogous to the conventional RS code. Both encoder and decoder of this code can be implemented in pipeline with Cellular Automata Array(CAA). The proposed decoder provides a simple, modular, and cost effective design that ideally suits for VLSI implementation.

Index Terms:

Cellular Automata(CA), S b EC-D b ED, Extended Reed-Soloman code, pipeline, t b EC - t b ED, Cellular Automata Array(CAA), VLSI

Citation:

S. Nandi, Ch. Rambabu, P. Pal Chaudhari, "A VLSI Architecture for Cellular Automata Based Reed-Solomon Decoder," ispan, pp.158, 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99), 1999

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