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1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97)
Efficiency of remote access caches in future SMP-based CC-NUMA multiprocessors: initial results
Taipei, Taiwan
December 18-December 20
ISBN: 0-8186-8259-0
E.D. Moreno, LSI-EPUSP, Sao Paulo Univ., Brazil
S.T. Kofuji, LSI-EPUSP, Sao Paulo Univ., Brazil
The paper evaluates the benefits of adding a shared remote access cache (RAC) in SMP based CC-NUMA multiprocessors. We consider symmetric multiprocessor (SMP) nodes as the building blocks for a multiprocessor due to its cost effectiveness, which makes SMP nodes an attractive choice for CC-NUMA designers. We base our experimental evaluation of the future architectures on realistic hardware parameters for state of the art systems components. What distinguishes our work from previous research is that we consider future processors and adequate values to access time to memory/caches/RACs, network and SMP bus speed. We simulate six applications from the SPLASH-2 benchmark suite to compare the performance application of our baseline architecture (current machines) and future architectures (approach-1: slow network and approach-2: fast network) when RACs are used in the system. The simulation results show that for a 32-processor system based on four-processor SMP nodes, the RACs improve the overall system performance by up to 32%, 28% and 20% for our baseline, approach-1, and approach-2, respectively. Similarly, the RACs diminish the execution time by up to 35%, 28.2% and 22% for two-processor SMP nodes. Therefore, our principal conclusion is that RACs reduce the execution time in future systems which have four or two 500 MHz processors per node.
Index Terms:
multiprocessing systems; shared remote access cache; future SMP based CC-NUMA multiprocessors; symmetric multiprocessor nodes; cost effectiveness; future architectures; realistic hardware parameters; state of the art systems components; SPLASH-2 benchmark suite; performance application; baseline architecture; approach-1; slow network; approach-2; fast network; 32-processor system; four-processor SMP nodes; execution time; two-processor SMP nodes
Citation:
E.D. Moreno, S.T. Kofuji, "Efficiency of remote access caches in future SMP-based CC-NUMA multiprocessors: initial results," ispan, pp.190, 1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97), 1997
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