Efficient reconfiguration scheme for mesh-connected network: the recursive shift approach

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	Similar Articles Articles by I. Numata Articles by S. Horiguchi

1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96)

Beijing, CHINA

June 12-June 14

ISBN: 0-8186-7460-1

	ASCII Text	x
	I. Numata, S. Horiguchi, "Efficient reconfiguration scheme for mesh-connected network: the recursive shift approach," Parallel Architectures, Algorithms, and Networks, International Symposium on, pp. 221, 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), 1996.

	BibTex	x
	@article{ 10.1109/ISPAN.1996.508985, author = {I. Numata and S. Horiguchi}, title = {Efficient reconfiguration scheme for mesh-connected network: the recursive shift approach}, journal ={Parallel Architectures, Algorithms, and Networks, International Symposium on}, volume = {0}, year = {1996}, issn = {1087-4089}, pages = {221}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISPAN.1996.508985}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Architectures, Algorithms, and Networks, International Symposium on TI - Efficient reconfiguration scheme for mesh-connected network: the recursive shift approach SN - 1087-4089 SP EP A1 - I. Numata, A1 - S. Horiguchi, PY - 1996 KW - fault tolerant computing; reconfigurable architectures; parallel architectures; multiprocessor interconnection networks; reconfiguration scheme; mesh-connected network; recursive shift; faulty processing elements; mesh arrays; redundant processing elements; fault tolerance; massively parallel system VL - 0 JA - Parallel Architectures, Algorithms, and Networks, International Symposium on ER -

I. Numata, Grad. Sch. of Inf. Sci., Japan Adv. Inst. of Sci. & Technol., Japan

S. Horiguchi, Grad. Sch. of Inf. Sci., Japan Adv. Inst. of Sci. & Technol., Japan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISPAN.1996.508985

Recently, several strategies have been studied to recover faulty processing elements on mesh arrays. S.Y. Kung et al. (1989) proposed a 1 1/2 track model for reconfiguration of mesh arrays and the reconfiguration algorithm based on graph theory by finding compensation paths. However, compensation path scheme does not perform reconfiguration efficiently since the strategy only focuses on faulty processing elements and requires global information. In this paper, we propose a new reconfiguration strategy named recursive shift to recover faulty processing elements on mesh arrays. It is confirmed that our strategy obtains much higher array yield than previous schemes without global information on identical redundant processing elements.

Index Terms:

fault tolerant computing; reconfigurable architectures; parallel architectures; multiprocessor interconnection networks; reconfiguration scheme; mesh-connected network; recursive shift; faulty processing elements; mesh arrays; redundant processing elements; fault tolerance; massively parallel system

Citation:

I. Numata, S. Horiguchi, "Efficient reconfiguration scheme for mesh-connected network: the recursive shift approach," ispan, pp.221, 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), 1996

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