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1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96)
The Compiler for Supporting Multithreading in Cyclic Register Windows
Beijing, CHINA
June 12-June 14
ISBN: 0-8186-7460-1
ASCII Text
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Li Cheng, Wang Dingxing, Shen Meiming, Zheng Weimin, Peng Shanling, "The Compiler for Supporting Multithreading in Cyclic Register Windows," Parallel Architectures, Algorithms, and Networks, International Symposium on, pp. 57, 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), 1996.
 
 
BibTex
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@article{ 10.1109/ISPAN.1996.508961,
author = {Li Cheng and Wang Dingxing and Shen Meiming and Zheng Weimin and Peng Shanling},
title = {The Compiler for Supporting Multithreading in Cyclic Register Windows},
journal ={Parallel Architectures, Algorithms, and Networks, International Symposium on},
volume = {0},
year = {1996},
issn = {1087-4089},
pages = {57},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISPAN.1996.508961},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Parallel Architectures, Algorithms, and Networks, International Symposium on
TI - The Compiler for Supporting Multithreading in Cyclic Register Windows
SN - 1087-4089
SP
EP
A1 - Li Cheng,
A1 - Wang Dingxing,
A1 - Shen Meiming,
A1 - Zheng Weimin,
A1 - Peng Shanling,
PY - 1996
KW - Multithreading
KW - pipeline
KW - register allocation
KW - multicomputers
KW - compilation optimization
VL - 0
JA - Parallel Architectures, Algorithms, and Networks, International Symposium on
ER -
 
Li Cheng, Tsinghua University
Wang Dingxing, Tsinghua University
Shen Meiming, Tsinghua University
Zheng Weimin, Tsinghua University
Peng Shanling, Tsinghua University
This paper presents the compilation technique to support the P&M (Pipelining and Multithreading) multithreaded program execution model on the SPARC processor, which has cyclic register windows. The program execution model improves the performance by running multiple user-level threads on each processor and filling the idle cycles that would otherwise be wasted waiting for messages. The integrated compilation paradigm is described systematically. The generated code is efficient, which obtains rapid context switching without sacrificing the benefit of fast procedure call.
Index Terms:
Multithreading, pipeline, register allocation, multicomputers, compilation optimization
Citation:
Li Cheng, Wang Dingxing, Shen Meiming, Zheng Weimin, Peng Shanling, "The Compiler for Supporting Multithreading in Cyclic Register Windows," ispan, pp.57, 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), 1996
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