34th International Symposium on Multiple-Valued Logic (ISMVL'04)
A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices
University of Toronto, Toronto, Canada
May 19-May 22
ISBN: 0-7695-2130-4
This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.
Citation:
Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu, "A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices," ismvl, pp.340-345, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004