Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic

I
ISMVL
2004
34th International Symposium on Multiple-Valued Logic (ISMVL'04)
Abstract - Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic

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34th International Symposium on Multiple-Valued Logic (ISMVL'04)

University of Toronto, Toronto, Canada

May 19-May 22

ISBN: 0-7695-2130-4

	ASCII Text	x
	S. N. Yanushkevich, V. P. Shmerko, L. Guy, D. C. Lu, "Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic," Multiple-Valued Logic, IEEE International Symposium on, pp. 275-280, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004.

	BibTex	x
	@article{ 10.1109/ISMVL.2004.1319954, author = {S. N. Yanushkevich and V. P. Shmerko and L. Guy and D. C. Lu}, title = {Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic}, journal ={Multiple-Valued Logic, IEEE International Symposium on}, volume = {0}, year = {2004}, issn = {0195-623X}, pages = {275-280}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.1319954}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Multiple-Valued Logic, IEEE International Symposium on TI - Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic SN - 0195-623X SP275 EP280 A1 - S. N. Yanushkevich, A1 - V. P. Shmerko, A1 - L. Guy, A1 - D. C. Lu, PY - 2004 KW - null VL - 0 JA - Multiple-Valued Logic, IEEE International Symposium on ER -

S. N. Yanushkevich, University of Calgary

V. P. Shmerko, University of Calgary

L. Guy, University of Calgary

D. C. Lu, University of Calgary

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.1319954

The three-dimensional (3D) model of a multiple valued network based on hypercube-like topology is proposed. A graph embedding technique is used to design hypercube based structures. It is shown that hypercube-like topology is a Single-Electron Transistor (SET) technology-oriented solution to the implementation of multiple-valued networks.

Citation:

S. N. Yanushkevich, V. P. Shmerko, L. Guy, D. C. Lu, "Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic," ismvl, pp.275-280, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004

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