34th International Symposium on Multiple-Valued Logic (ISMVL'04)
A Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Technique and its Applications
University of Toronto, Toronto, Canada
May 19-May 22
ISBN: 0-7695-2130-4
This paper presents a multiple-valued logic design technique using self-restored current-mode CMOS (CMCL). The design technique is discussed with two practical circuit examples including a majority circuit and a tally circuit. The resulting circuits are also compared with their binary equivalents in terms of area.
Citation:
Daniel H. Y. Teng, Ronald J. Bolton, "A Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Technique and its Applications," ismvl, pp.204-209, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004