Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation

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34th International Symposium on Multiple-Valued Logic (ISMVL'04)

University of Toronto, Toronto, Canada

May 19-May 22

ISBN: 0-7695-2130-4

	ASCII Text	x
	Hideki Fukuda, "Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation," Multiple-Valued Logic, IEEE International Symposium on, pp. 128-134, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004.

	BibTex	x
	@article{ 10.1109/ISMVL.2004.1319931, author = {Hideki Fukuda}, title = {Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation}, journal ={Multiple-Valued Logic, IEEE International Symposium on}, volume = {0}, year = {2004}, issn = {0195-623X}, pages = {128-134}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.1319931}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Multiple-Valued Logic, IEEE International Symposium on TI - Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation SN - 0195-623X SP128 EP134 A1 - Hideki Fukuda, PY - 2004 KW - null VL - 0 JA - Multiple-Valued Logic, IEEE International Symposium on ER -

Hideki Fukuda, New Japan Radio Co., Ltd.

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.1319931

A design is proposed for a voltage-mode signed digit CMOS (SD-CMOS) logic circuit. Theis circuit can provide stable, static operation with a multi-voltage power supply, and it can be fabricated by applyingwith standard CMOS process technology. Key components based on the proposed circuit design, such as a driver circuit, an inverter circuit, a general CMOS logic circuit, and a D-F/F, are described. The Each circuit?s? element numbers, operation speeds, and power consumption are examined from the viewpoint of system applications.

Citation:

Hideki Fukuda, "Signed Digit CMOS (SD-CMOS) Logic Circuits with Static Operation," ismvl, pp.128-134, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004

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