L. Bhuyan, H. Wang, R. Iyer, A. Kumar, "Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors," Parallel Processing Symposium, International, pp. 0466, 12th. International Parallel Processing Symposium, 1998.

@article{ 10.1109/IPPS.1998.669958,
author = {L. Bhuyan and H. Wang and R. Iyer and A. Kumar},
title = {Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors},
journal ={Parallel Processing Symposium, International},
volume = {0},
year = {1998},
isbn = {0-8186-8403-8},
pages = {0466},
doi = {http://doi.ieeecomputersociety.org/10.1109/IPPS.1998.669958},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Parallel Processing Symposium, International
TI - Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
SN - 0-8186-8403-8
SP
EP
A1 - L. Bhuyan,
A1 - H. Wang,
A1 - R. Iyer,
A1 - A. Kumar,
PY - 1998
VL - 0
JA - Parallel Processing Symposium, International
ER -