M. Taveniku, A. Ahlander, M. Jonsson, B. Svensson, "The VEGA Moderately Parallel MIMD, Moderately Parallel SIMD, Architecture for High Performance Array Signal Processing," Parallel Processing Symposium, International, pp. 0226, 12th. International Parallel Processing Symposium, 1998.

@article{ 10.1109/IPPS.1998.669915,
author = {M. Taveniku and A. Ahlander and M. Jonsson and B. Svensson},
title = {The VEGA Moderately Parallel MIMD, Moderately Parallel SIMD, Architecture for High Performance Array Signal Processing},
journal ={Parallel Processing Symposium, International},
volume = {0},
year = {1998},
isbn = {0-8186-8403-8},
pages = {0226},
doi = {http://doi.ieeecomputersociety.org/10.1109/IPPS.1998.669915},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Parallel Processing Symposium, International
TI - The VEGA Moderately Parallel MIMD, Moderately Parallel SIMD, Architecture for High Performance Array Signal Processing
SN - 0-8186-8403-8
SP
EP
A1 - M. Taveniku,
A1 - A. Ahlander,
A1 - M. Jonsson,
A1 - B. Svensson,
PY - 1998
VL - 0
JA - Parallel Processing Symposium, International
ER -