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10th International Parallel Processing Symposium (IPPS '96)
Some image processing algorithms on a RAP with wider bus networks
Honolulu, HI
April 15-April 19
ISBN: 0-8186-7255-2
ASCII Text
x 
 
Shung-Shing Lee, Shi-Jinn Horng, Horng-Ren Tsai, Yu-Hua Lee, "Some image processing algorithms on a RAP with wider bus networks," Parallel Processing Symposium, International, pp. 708, 10th International Parallel Processing Symposium (IPPS '96), 1996.
 
 
BibTex
x
 
@article{ 10.1109/IPPS.1996.508136,
author = {Shung-Shing Lee and Shi-Jinn Horng and Horng-Ren Tsai and Yu-Hua Lee},
title = {Some image processing algorithms on a RAP with wider bus networks},
journal ={Parallel Processing Symposium, International},
volume = {0},
year = {1996},
issn = {1063-7133},
pages = {708},
doi = {http://doi.ieeecomputersociety.org/10.1109/IPPS.1996.508136},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Processing Symposium, International
TI - Some image processing algorithms on a RAP with wider bus networks
SN - 1063-7133
SP
EP
A1 - Shung-Shing Lee,
A1 - Shi-Jinn Horng,
A1 - Horng-Ren Tsai,
A1 - Yu-Hua Lee,
PY - 1996
KW - image segmentation; parallel algorithms; parallel architectures; image processing; reconfigurable architectures; system buses; multiprocessor interconnection networks; image processing algorithms; RAP; wider bus networks; reconfigurable array of processors; parallel algorithms; computation power; base-m number system; constant time; histogram; image segmentation; image labeling
VL - 0
JA - Parallel Processing Symposium, International
ER -
 
Shung-Shing Lee, Dept. of Electr. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Shi-Jinn Horng, Dept. of Electr. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Horng-Ren Tsai, Dept. of Electr. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Yu-Hua Lee, Dept. of Electr. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Based on the reconfigurable array of processors with wider bus networks (Li et al., 1995), we propose a series of algorithms for image processing. Conventionally, only one bus is connected between two processors but in this machine it has a set of buses. Such a characteristic increases the computation power of this machine greatly. Based on the base-m number system, we first introduce some basic operation algorithms. Then three related applications are derived in constant time; one is the histogram of an image, another is the image segmentation and the other is the image labeling.
Index Terms:
image segmentation; parallel algorithms; parallel architectures; image processing; reconfigurable architectures; system buses; multiprocessor interconnection networks; image processing algorithms; RAP; wider bus networks; reconfigurable array of processors; parallel algorithms; computation power; base-m number system; constant time; histogram; image segmentation; image labeling
Citation:
Shung-Shing Lee, Shi-Jinn Horng, Horng-Ren Tsai, Yu-Hua Lee, "Some image processing algorithms on a RAP with wider bus networks," ipps, pp.708, 10th International Parallel Processing Symposium (IPPS '96), 1996
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