Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing

I
IPPS
1995
9th International Parallel Processing Symposium
Abstract - Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing

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	Similar Articles Articles by Tsan-Sheng Hsu Articles by V. Ramachandran Articles by N. Dean

9th International Parallel Processing Symposium

Santa Barbara, CA

April 25-April 28

ISBN: 0-8186-7074-6

	ASCII Text	x
	Tsan-Sheng Hsu, V. Ramachandran, N. Dean, "Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing," Parallel Processing Symposium, International, pp. 106, 9th International Parallel Processing Symposium, 1995.

	BibTex	x
	@article{ 10.1109/IPPS.1995.395921, author = {Tsan-Sheng Hsu and V. Ramachandran and N. Dean}, title = {Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing}, journal ={Parallel Processing Symposium, International}, volume = {0}, year = {1995}, issn = {1063-7133}, pages = {106}, doi = {http://doi.ieeecomputersociety.org/10.1109/IPPS.1995.395921}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Parallel Processing Symposium, International TI - Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing SN - 1063-7133 SP EP A1 - Tsan-Sheng Hsu, A1 - V. Ramachandran, A1 - N. Dean, PY - 1995 KW - parallel algorithms; graph theory; virtual machines; parallel graph algorithms; massively parallel SIMD computer; virtual processing; graph algorithms; MasPar MP-1 VL - 0 JA - Parallel Processing Symposium, International ER -

Tsan-Sheng Hsu, Inst. of Inf. Sci., Acad. Sinica, Taipei, Taiwan

V. Ramachandran, Inst. of Inf. Sci., Acad. Sinica, Taipei, Taiwan

N. Dean, Inst. of Inf. Sci., Acad. Sinica, Taipei, Taiwan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPPS.1995.395921

We describe our implementation, with virtual processing, of several parallel graph algorithms on a 16,384-processor MasPar MP-1. We present extensive test data on our code.

Index Terms:

parallel algorithms; graph theory; virtual machines; parallel graph algorithms; massively parallel SIMD computer; virtual processing; graph algorithms; MasPar MP-1

Citation:

Tsan-Sheng Hsu, V. Ramachandran, N. Dean, "Implementation of parallel graph algorithms on a massively parallel SIMD computer with virtual processing," ipps, pp.106, 9th International Parallel Processing Symposium, 1995

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