There has been considerable research on quantum cellular automata (QCA) as a new computing scheme in the nano-scale regimes. In this paper, a detailed simulation-based characterization of defects in different QCA logic and interconnect devices and study of their effects at logic-level are presented. Various failure mechanisms which can potentially happen during nano-manufacturing of these devices have been considered and simulated. Different implementations of QCA logic devices and interconnects are also compared in term of defect tolerance and testability. The same study is performed for new proposed QCA devices too. The simulation results show that additional fault models at logic level must be considered for testing of QCA-based circuits.