Research into interconnection networks pre-dates the development of integrated circuits and even the transistor. As a result, much pioneering and fundamental research has established an enormous body of knowledge in this field. Recently, we have turned our attention to the design of crossbar switches using dynamically reconfigurable FPGAs. Our first effort resulted in a reconfigurable crossbar structure that introduced novel circuit techniques and set new performance benchmarks. More recently, we have exploited the availability of FPGAs with integrated microprocessors and dynamic reconfiguration to design multi-stage networks based on strictly, non-blocking Clos architectures. The results are very encouraging and improve the benchmarks achieved with our original design for all but one metric. Since interconnection is fundamental to all processing architectures we hope that our work will find relevance in future reconfigurable architectures.