International Parallel and Distributed Processing Symposium (IPDPS'03)
Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping
Nice, France
April 22-April 26
ISBN: 0-7695-1926-1
Zdenek Pohl, Institute of Information Theory and Automation
Jan Schier, Institute of Information Theory and Automation
Milan Tichy, Institute of Information Theory and Automation
Jiri Kadlec, Institute of Information Theory and Automation
The paper is focused on the rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using the Xilinx System Generator (XSG) is reviewed on an example of the High-Speed Logarithmic Arithmetic (HSLA) unit. An alternative approach using the combination of the Real Time Workshop (RTW) with the Handle-C compiler for automatized generation of the HDL code is presented. Finally, the possibilities to extend this solution in order to support the run-time reconfigurations are outlined.
Citation:
Zdenek Pohl, Jan Schier, Miroslav Licko, Antonin Hermanek, Milan Tichy, Rudolf Matousek, Jiri Kadlec, "Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping," ipdps, pp.190a, International Parallel and Distributed Processing Symposium (IPDPS'03), 2003