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International Parallel and Distributed Processing Symposium (IPDPS'03)
Dependability Analysis: A New Application for Run-Time Reconfiguration
Nice, France
April 22-April 26
ISBN: 0-7695-1926-1
R. Leveugle, TIMA Laboratory
L. Antoni, TIMA Laboratory
B. Fehér, Budapest University of Technology and Economics
The probability of faults, and especially transient faults, occurring in the field is increasing with the evolutions of the CMOS technologies. It becomes therefore crucial to predict the potential consequences of such faults on the applications. Fault injection techniques based on the high level descriptions of the circuits have been proposed for an early dependability analysis. In this paper, a new approach is proposed, based on emulation and run-time reconfiguration. Performance evaluations and practical experiments on a Virtex development board are reported.
Index Terms:
Digital circuits, fault injection, dependability analysis, hardware emulation, run-time reconfiguration
Citation:
R. Leveugle, L. Antoni, B. Fehér, "Dependability Analysis: A New Application for Run-Time Reconfiguration," ipdps, pp.173b, International Parallel and Distributed Processing Symposium (IPDPS'03), 2003
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